1. Field of the Invention
The present invention relates to a method for transferring charge and a charge transfer device, and more specifically to a multiline reading CCD (charge coupled device) register for reading signals from pixels (picture elements) arranged at fine pitches (intervals). In addition, the present invention relates to a solid-state image sensing device including the same charge transfer device.
2. Description of the Prior Art
The charge transfer device such as the CCD register is now widely used as signal charge transfer sections for the solid-state image sensing device. In particular, the multiline reading CCD register has become important more and more, because of its adaptability to a high resolution image sensor of fine pitch.
A conventional structure of a charge transfer device will be described hereinbelow by taking the case of a CCD linear image sensor using the multiline reading CCD register.
FIG. 1 is a plan view showing an example of the conventional CCD linear image sensor formed on a semiconductor substrate. In the drawing, there is shown a two-line reading CCD register, by which signal charges generated by pixels 1 arranged in a row (i.e. a photoelectric conversion section) are read by two CCD registers 3 and 5. A shift gate 2 is disposed so as to correspond to all the pixels, and transfer gates 4 are arranged alternately along a row of the pixels 1 so as to correspond to every other pixel. When predetermined driving pulses are applied to respective transfer electrodes of the respective sections, signal charges are transferred from the pixels 1 of odd numbers to the outer CCD register 5 and from the pixels 1 of even numbers to the inner CCD register 3, as shown by dashed arrows in FIG. 1. The transferred charges are outputted to the outside through output buffers 6 and 7, respectively.
In the structure as described above, since twice the number of signal charges can be transferred by the use of the two CCD registers of the same pitch, it is possible to arrange the pixels at double the pitch. In other words, in the linear image sensor using the multiline reading CCD register, it is possible to increase the pixel density in an arrangement.
FIGS. 2 and 3 are cross-sectional views showing the CCD linear image sensor, taken along the lines A--A' and B--B' both shown in FIG. 1. In FIGS. 2 and 3, a potential distribution diagram is also shown, respectively. Further, FIG. 4 is an enlarged view showing the essential portions of the solid-state image sensing device of the CCD linear image sensor. Further, FIG. 5 is a drive timing chart between the transfer times t1 and t5, during which a predetermined signal charge is transferred in the CCD linear image sensor.
The shift gate 2 and the transfer gate 4 are connected to exclusive drive pulse wires SH and TG, respectively, and drive pulse wires .PHI.1 and .PHI.2 are connected to the transfer electrodes of the CCD registers 3 and 5 alternately. For example, as shown in FIG. 4, the drive pulse wire .PHI.1 is connected to the transfer electrodes at the cross section taken along the line A--A' shown in FIG. 1, and the drive pulse wire .PHI.2 is connected to the transfer electrodes at the cross section taken along the line B--B' shown in FIG. 1.
First, at the time t1, the signal charges are stored in the pixels 1. At the succeeding time t2, a pulse voltage is applied to the shift gate 2 to open the gate, so that the signal charges are transferred from the pixels 1 to the shift gate 2. Thereafter, at the time t3, the transferred signal charges are shifted to the CCD registers 31 and 32, respectively. Further, at the time t4, only the signal charge in the CCD register 31 is shifted to the transfer gate 4, and further to the CCD register 51 at the time t5. After that, the signal charges are transferred within the CCD by two-phase pulses and then outputted to the outside.
The problem involved in the conventional multiline reading CCD register is that the signal charges remain without being transferred during the transfer operation between the registers. In case the signal charges remain without being transferred, vertical strips appear on the display plane, so that the picture quality is deteriorated markedly. In addition, in case only one bit remains in one line, the IC is defective, thus resulting in the cause of a drop in IC production yield.
The reason why the charges remain is that the channel width is narrowed at the output side of the first register so that the barrier is produced due to the narrow channel effect or the charges remain in the channel due to contamination. Although these problems have been solved to some extent by improving the pattern design and the manufacturing process of the charge transfer device, it is extremely difficult to perfectly eliminate the remaining charges in the line. In addition, since the quantity of charges to be processed decreases with increasing sensitivity of the image sensing device and also the number of signals increases with increasing number of pixels, there exists a problem in that the probability of occurrence of the remaining charges increases.